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MC74LCX574 Low-Voltage CMOS Octal D-Type Flip-Flop Flow Through Pinout
With 5 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)
The MC74LCX574 is a high performance, non-inverting octal D-type flip-flop operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX574 inputs to be safely driven from 5.0 V devices. The MC74LCX574 consists of 8 edge-triggered flip-flops with individual D-type inputs and 3-state true outputs. The buffered clock and buffered Output Enable (OE) are common to all flip-flops. The eight flip-flops will store the state of individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the OE LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. The OE input level does not affect the operation of the flip-flops. The LCX574 flow through design facilitates easy PC board layout.
Features http://onsemi.com MARKING DIAGRAMS
20 SOIC-20 DW SUFFIX CASE 751D 1 LCX574 AWLYYWW
20 1
20 TSSOP-20 DT SUFFIX CASE 948E 1 LCX 574 ALYW
20 1
* * * * * * * * * * *
Designed for 2.3 to 3.6 V VCC Operation 5 V Tolerant - Interface Capability With 5 V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance: Human Body Model >2000 V Machine Model >200 V Pb-Free Packages are Available*
20 SOEIAJ-20 M SUFFIX CASE 967 1 74LCX574 AWLYWW
20 1
A L, WL Y, YY W, WW
= = = =
Assembly Location Wafer Lot Year Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
1
February, 2005 - Rev. 5
Publication Order Number: MC74LCX574/D
MC74LCX574
VCC 20 O0 19 O1 18 O2 17 O3 16 O4 15 O5 14 O6 13 O7 12 CP 11 OE CP 1 11 nCP D nCP D nCP D nCP D nCP D nCP D nCP D nCP D 19 Q
D0
2
O0
1 OE
2 D0
3 D1
4 D2
5 D3
6 D4
7 D5
8 D6
9 D7
10 GND D1
18 Q
3
O1
Figure 1. Pinout: 20-Lead (Top View)
D2 4
17 Q
O2
D3
5
16 Q
O3
PIN NAMES
Pins OE CP D0-D7 O0-O7 Function Output Enable Input Clock Pulse Input Data Inputs 3-State Outputs D4
15 Q
6
O4
14 Q
D5
7
O5
13 Q
D6
8
O6
D7
9
12 Q
O7
Figure 2. LOGIC DIAGRAM TRUTH TABLE
INPUTS OE L L L H H H H h L l NC X Z = = = = = = = = = CP Dn l h X X l h INTERNAL LATCHES Q L H NC NC L H OUTPUTS On L H NC Z Z Z OPERATING MODE Load and Read Register Hold and Read Register Hold and Disable Outputs Load Internal Register and Disable Outputs
High Voltage Level High Voltage Level One Setup Time Prior to the Low-to-High Clock Transition Low Voltage Level Low Voltage Level One Setup Time Prior to the Low-to-High Clock Transition No Change High or Low Voltage Level and Transitions are Acceptable High Impedance State Low-to-High Transition Not a Low-to-High Transition; For ICC Reasons, DO NOT FLOAT Inputs
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MC74LCX574
MAXIMUM RATINGS
Symbol VCC VI VO Parameter DC Supply Voltage DC Input Voltage DC Output Voltage Value -0.5 to +7.0 -0.5 VI +7.0 -0.5 VO +7.0 -0.5 VO VCC + 0.5 IIK IOK DC Input Diode Current DC Output Diode Current -50 -50 +50 IO ICC IGND TSTG DC Output Source/Sink Current DC Supply Current Per Supply Pin DC Ground Current Per Ground Pin Storage Temperature Range 50 100 100 -65 to +150 Output in 3-State Note 1 VI < GND VO < GND VO > VCC Condition Unit V V V V mA mA mA mA mA mA C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO IOH IOL IOH IOL TA Dt/DV Supply Voltage Input Voltage Output Voltage (HIGH or LOW State) (3-State) Parameter Operating Data Retention Only Min 2.0 1.5 0 0 0 Typ 3.3 3.3 Max 3.6 3.6 5.5 VCC 5.5 -24 24 -12 12 -40 0 +85 10 Unit V V V mA mA mA mA C ns/V
HIGH Level Output Current, VCC = 3.0 V - 3.6 V LOW Level Output Current, VCC = 3.0 V - 3.6 V HIGH Level Output Current, VCC = 2.7 V - 3.0 V LOW Level Output Current, VCC = 2.7 V - 3.0 V Operating Free-Air Temperature Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
ORDERING INFORMATION
Device MC74LCX574DWR2 MC74LCX574DWR2G MC74LCX574DT MC74LCX574DTR2 MC74LCX574MEL Package SOIC-20 SOIC-20 (Pb-Free) TSSOP-20* TSSOP-20* SOEIAJ-20 Shipping 1000 Tape & Reel 1000 Tape & Reel 75 Units / Rail 2000 Tape & Reel 2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74LCX574
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C Symbol VIH VIL VOH Characteristic HIGH Level Input Voltage (Note 2) LOW Level Input Voltage (Note 2) HIGH Level Output Voltage Condition 2.7 V VCC 3.6 V 2.7 V VCC 3.6 V 2.7 V VCC 3.6 V; IOH = -100 mA VCC = 2.7 V; IOH = -12 mA VCC = 3.0 V; IOH = -18 mA VCC = 3.0 V; IOH = -24 mA VOL LOW Level Output Voltage 2.7 V VCC 3.6 V; IOL = 100 mA VCC = 2.7 V; IOL= 12 mA VCC = 3.0 V; IOL = 16 mA VCC = 3.0 V; IOL = 24 mA II IOZ IOFF ICC Input Leakage Current 3-State Output Current Power-Off Leakage Current Quiescent Supply Current 2.7 V VCC 3.6 V; 0 V VI 5.5 V 2.7 VCC 3.6 V; 0 V VO 5.5 V; VI = VIH or V IL VCC = 0 V; VI or VO = 5.5 V 2.7 VCC 3.6 V; VI = GND or VCC 2.7 VCC 3.6 V; 3.6 VI or VO 5.5 V DICC Increase in ICC per Input 2.7 VCC 3.6 V; VIH = VCC - 0.6 V 2. These values of VI are used to test DC electrical characteristics only. VCC - 0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 5.0 5.0 10 10 10 500 mA mA mA mA mA mA V Min 2.0 0.8 Max Unit V V V
AC CHARACTERISTICS (tR = tF = 2.5 ns; CL = 50 pF; RL = 500 W)
Limits TA = -40C to +85C VCC = 3.0 V to 3.6 V Symbol fmax tPLH tPHL tPZH tPZL tPHZ tPLZ ts th tw tOSHL tOSLH Parameter Clock Pulse Frequency Propagation Delay CP to On Output Enable Time to HIGH and LOW Levels Output Disable Time from HIGH and LOW Levels Setup TIme, HIGH or LOW Dn to CP Hold TIme, HIGH or LOW Dn to CP CP Pulse Width, HIGH or LOW Output-to-Output Skew (Note 3) Waveform 1 1 2 2 1 1 3 Min 150 1.5 1.5 1.5 1.5 1.5 1.5 2.5 1.5 3.3 1.0 1.0 8.5 8.5 8.5 8.5 6.5 6.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 1.5 3.3 9.5 9.5 9.5 9.5 7.0 7.0 Max VCC = 2.7 V Min Max Unit MHz ns ns ns ns ns ns ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design.
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MC74LCX574
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25C Symbol VOLP VOLV Characteristic Dynamic LOW Peak Voltage (Note 4) Dynamic LOW Valley Voltage (Note 4) Condition VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V Min Typ 0.8 0.8 Max Unit V V
4. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH-to-LOW or LOW-to-HIGH. The remaining output is measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol CIN COUT CPD Parameter Input Capacitance Output Capacitance Power Dissipation Capacitance Condition VCC = 3.3 V, VI = 0 V or VCC VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 3.3 V, VI = 0 V or VCC Typical 7 8 25 Unit pF pF pF
2.7 V 2.7 V Dn th 2.7 V CP 1.5 V 0V fmax tPLH, tPHL VOH On 1.5 V VOL WAVEFORM 1 - PROPAGATION DELAYS, SETUP AND HOLD TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns On tPZL 1.5 V tPLZ On 1.5 V 1.5 V 0V ts OE tPZH 1.5 V 1.5 V 0V tPHZ VCC VOH - 0.3 V 0V 3.0 V VOL + 0.3 V GND WAVEFORM 2 - OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns 2.7 V CP 1.5 V tw 1.5 V 0V 2.7 V 1.5 V 0V WAVEFORM 3 - PULSE WIDTH tR = tF = 2.5 ns (or fast as required) from 10% to 90%; Output requirements: VOL 0.8 V, VOH 2.0 V
tw CP 1.5 V
Figure 3. AC Waveforms
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MC74LCX574
VCC 6V OPEN GND
PULSE GENERATOR RT
DUT CL
R1 RL
TEST tPLH, tPHL tPZL, tPLZ Open Collector/Drain tPLH and tPHL tPZH, tPHZ
SWITCH Open 6V 6V GND
CL = 50 pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500 W or equivalent RT = ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
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MC74LCX574
PACKAGE DIMENSIONS
SOIC-20 DW SUFFIX CASE 751D-05 ISSUE G
D
A
11 X 45 _
q
H
M
B
M
20
10X
0.25
E
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
TSSOP-20 DT SUFFIX CASE 948E-02 ISSUE B
20X
K REF
M
L
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
2X
L/2
L
PIN 1 IDENT 1 10
B -U-
J J1
N 0.15 (0.006) T U
S
A -V- N F
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
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IIII IIII IIII
SECTION N-N M DETAIL E
20
11
K K1
0.25 (0.010)
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
DIM A B C D F G H J J1 K K1 L M
MC74LCX574
PACKAGE DIMENSIONS
SOEIAJ-20 M SUFFIX CASE 967-01 ISSUE O
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.81 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.032
b 0.13 (0.005)
M
A1 0.10 (0.004)
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MC74LCX574/D

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